The present invention relates to a memory device, and more particularly to a semiconductor memory device which is fabricated as a semiconductor integrated circuit.
Semiconductor memory devices have come to have large memory capacities, and the internal signals read-out signals from memory cells are reduced to a minute level. For stably processing the reduced read-out signals and for realizing high-speed operations, a construction of a memory device in which a signal emitted from a memory cell onto a digit line is once amplified by means of a differential amplifier called a "digit sense amplifier" and then transmitted to an external device, is often used. In such memory devices, those employing one-transistor type memory cells having one transistor and one capacitor are generally utilized. Such a memory device is constructed by disposing a memory cell at every cross-point of a matrix formed by a plurality of word lines and a plurality of digit lines each coupled to a sense amplifier. The sense amplifier is provided with a signal read-out from a memory cell via a digit line and amplifies the signal. In recent years, memory capacity has been enlarged and the number of memory cells connected to one digit line has been greatly increased. Consequently, an electrostatic capacitance of the digit line has been inevitably increased. Therefore, a level of an input signal to a sense amplifier is often reduced, resulting in malfunctions of the sense amplifier. For the purpose of compensating for such reduction of the input signal level, it has been necessary to make a sense amplifier highly senstitive and/or to increase an electrostatic capacitance of memory cells themselves for enhancing the level read-out from a selected cell on the digit line. As a result there has been a disadvantage that a chip size is eventually enlarged. In addition, increase in an electrostatic capacitance formed by a digit line in itself results in a delay circuit having a large time-constant, and hence the prior art device also has a disadvantage that a speed of read-out operations is greatly reduced.
Moreover, prior to respective read-out operation, it is necessary to charge digit line up to a predetermined potential to effect the so-called precharge. When a sense amplifier operates to amplify the read-out signal, among the precharged digit lines one having a lower readout signal applied thereto will be discharged to the ground potential. Accordingly, increase in the digit line capacitance would disadvantageously result in increase in dynamic power consumption.